1. Field of the Invention
The invention relates to a solid-state image sensor and a method of fabricating the same, and more particularly to a solid-state image sensor capable of preventing occurrence of smear, and a method of fabricating the same.
2. Description of the Related Art
FIG. 1 illustrates a unit cell of a CMOS sensor which is an active XY address type solid-state image sensor.
The illustrated unit cell is comprised of a p-type silicon substrate 10, a p-type well 12 formed in the p-type silicon substrate 10, an n-type region 14 formed in the p-type well 12 and acting as a photodiode, a gate insulating film 16 formed on a surface of the p-type silicon substrate 10 and composed of silicon dioxide (SiO.sub.2), a reset gate 18 formed on the gate insulating film 16 and composed of polysilicon, a reset drain region 20 composed of an n.sup.+ type region, a field oxide film 21 for electrical isolation between regions in each of which a device is to be fabricated, and a light-impermeable film 22 composed of metal and having an opening 23 through which light enters the n-type region 14.
An interlayer insulating film and a wiring layer are formed between the light-impermeable film 22 and the n-type region 14 in which light is converted into electricity.
The n-type region 14 is electrically connected to a source follower amplifier 24. As illustrated in FIG. 1, the source follower amplifier 24 is comprised of (a) a first MOS transistor 26 acting as a selector switch, (b) a second MOS transistor 28 having a source electrically connected to a drain of the first MOS transistor 26, a source electrically connected to a voltage Vdd, and a gate electrically connected to the n-type region 14, (c) a third MOS transistor 29 acting as a load, and having a drain electrically connected to a source of the first MOS transistor 26, and a source electrically connected to a voltage Vss, and (d) an output terminal 30 electrically connected to a source of the first MOS transistor 26 and a drain of the third MOS transistor 29.
The CMOS sensor illustrated in FIG. 1 operates as follows.
First, a high pulse .PHI..sub.R is applied to the reset gate 18 to thereby cause the n-type region 14 acting as a photodiode, to have a certain potential. Then, a low pulse .PHI..sub.R is applied to the reset gate 18 to thereby accumulate electric charges in a depletion layer which electric charges have been generated by converting light into electricity.
A potential of the photodiode 14 varies in accordance with the thus accumulated electric charges. Variation in the potential is output through the output terminal 30 of the source follower amplifier 24.
In such a conventional CMOS sensor as illustrated in FIG. 1, since an interlayer insulating film and a plurality of wiring layers are sandwiched between the light-impermeable film 22 and the n-type region or light-electricity converting region 14, the light-impermeable film 22 is much spaced away from the n-type region 14. Hence, light 25 diffracted due to diffraction effect of light having passed through the opening 23 reaches a border area of the light-electricity converting region 14, as illustrated in FIG. 1.
Thus, the conventional CMOS sensor is accompanied with a problem of so-called smear that light reaching a border of the light-electricity converting region or n-type region 14 due to diffraction effect is converted into electricity to thereby generate a false signal.
In addition, the thus generated false signal is trapped in adjacent light-electricity converting regions or in a diffusion layer of the source follower amplifier 24, resulting in another problem that a S/N ratio of image signals is degraded.